Even though socket 754 is still in the birthing (and to the enthusiast, soon to be dying) stages, there are quite a few choices for what motherboard to get to accompany it. For the moment, there are only two chipsets that can be found easily in retail channels, the nForce3 150, and the one powering today's entrant, the VIA K8T800. Albatron's K8X800 Pro II implements this north bridge and south bridge combination, as well as a few other IC 's from VIA in this loaded motherboard. Today on DevHardware, we'll be looking in depth at what these two Taiwainese manufacturers have accomplished with their efforts.
Albatron at this point no longer needs much of an introduction. While not at the point being one of the ''Tier I" OEM manufacturers for video cards or motherboards, they are solidly in the "Tier II'' area. As a spin-off of Giga-Byte, they have some of the same features, and go after the same enthusiast market. They have made some of the best overclocking GeForce 4 Ti cards, but does this socket 754 board stack up to the example set before it?
As I mentioned before, the chipset used to power this board is the VIA K8T800 north bridge (NB) and VT8237 south bridge (SB). This is a standard arrangement, even though there is very little going on in that NB. In a traditional setup, the NB is comprised of mainly a memory controller and an AGP controller. In this architecture however, that memory functionality has been moved on board the Athlon 64 processor. Typically, this has been a weak point for VIA, but thanks to AMD, it's no longer much of a concern for them; with the memory controller moved, the north bridge no longer has a lot to do. This is why we've seen the nVidia nForce3 150 solutions move to a single chip. VIA, like SiS and ALi, has stuck with two chips, mainly for cost reasons: VIA uses a mass produced south bridge from its other solutions, and connect it to a rather simple north bridge design. Connecting the north bridge to the processor is the now famous "Hyper Transport" (HT) bus. VIA has been trumpeting the fact that it has fully implemented the standard for both upstream and downstream (800 MHz and 16 bits wide), while the nForce3 150 does not. Perhaps in a future review we will see how much of a deficit that is.
The hidden truth is that while the NB is connected to the processor at high speeds, the interconnect to the SB is quite slow by comparison. The nForce3 150 doesn't even have a bus to the south bridge as it's a single chip, while the SiS solution uses a large 1GB/s bus between the two, and the ALi one has another Hyper Transport link. This has to be considered something for VIA to upgrade in a future revision, especially considering all of the high traffic devices now populating this board. Most likely this won't be an issue soon, with the implementation of PCI Express in the coming months, as that bus design has bandwidth to spare and could be used like the PCI bus of old to connect the NB and SB as well as piggy backing your peripheral devices.
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