Computer Processors

  Home arrow Computer Processors arrow x86-64: The Golden Handcuffs
Watch our Tech Videos 
Dev Hardware Forums 
Computer Cases  
Computer Processors  
Computer Systems  
Digital Cameras  
Flat Panels  
Hardware Guides  
Hardware News  
Input Devices  
Mobile Devices  
Networking Hardware  
PC Cooling  
PC Speakers  
Power Supply Units  
Sound Cards  
Storage Devices  
Tech Interviews  
User Experiences  
Video Cards  
Weekly Newsletter
Developer Updates  
Free Website Content 
 RSS  Articles
 RSS  Forums
 RSS  All Feeds
Write For Us 
Contact Us 
Site Map 
Privacy Policy 
  >>> SIGN UP!  
  Lost Password? 

x86-64: The Golden Handcuffs
  • Search For More Articles!
  • Disclaimer
  • Author Terms
  • Rating: 2 stars2 stars2 stars2 stars2 stars / 22

    Table of Contents:
  • x86-64: The Golden Handcuffs
  • CISC vs RISC
  • x86-32, IA-64, And Now x86-64
  • Conclusion

  • Rate this Article: Poor Best 
      Del.ici.ous Digg
      Blink Simpy
      Google Spurl
      Y! MyWeb Furl
    Email Me Similar Content When Posted
    Add Developer Shed Article Feed To Your Site
    Email Article To Friend
    Print Version Of Article
    PDF Version Of Article


    x86-64: The Golden Handcuffs

    (Page 1 of 4 )

    With the discussion over x86-64 becoming prevalent now that Intel has decided to adopt it for their Xeon workstation processors, and likely, their desktop equivalents at some point in the future, I figured that it was a good time to go over what this means to the hardware and development communities. We’ll be taking an in depth look at how those pieces of silicon work.

    It would be very difficult to explain how Intel’s move truly affects anything without a look back at what an instruction set architecture really means. So that’s where we’ll begin.

    Instruction Set Architecture

    In the language of computers, the “instruction set” is all the possible words in the dictionary. Of course, to a computer these are all represented by 1’s and 0’s, but we’ll pretend that they’re letters and numbers.

    Instructions are the lowest level that can be coded at. In comparison, today’s code, written to be executed in Java or C, is considered high level, as the programmer is not aware of the hardware that this code is being run on. Before 80x86 came along, most programmers were content to write at this base (or low) level. Writing code at the low level means you are moving data along the paths from register to register, and to the functional units of the processor.

    Registers are the smallest parts that are “user accessible,” and are nothing more than a really small data storage space. Data must be moved into registers for it to be worked on, since you can’t actually perform an operation on something that is in any of the parts of the storage hierarchy, be it cache, ram, or hard disk. With many instruction sets, hand coding at this level is not too difficult, and ends up being quite efficient. The types of instructions available allow for most math expressions, such as adds, subtractions, multiplies, and divides, as well as control commands such as loads and stores to and from memory, shifting bits within registers, conditional and unconditional branches, and jumps to different places in the program.

    The specific instruction set determines what type of machine the processor is. There are two main overall design types, CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer).

    More Computer Processors Articles
    More By DMOS

    blog comments powered by Disqus


    - Intel Unveils Itanium 9500 Processors
    - Intel`s Ultra-Quick i5 and i7 Processors Ava...
    - Intel Nehalem
    - VIA Nano
    - Intel Atom
    - Intel Celeron 420
    - Intel Pentium E2140
    - Inside the Machine by Jon Stokes
    - Chip History from 1970 to Today
    - A Brief History of Chips
    - Intel Shows Off at Developer Forum
    - Core 2 Quadro Review
    - Core Concepts
    - AMD Takes on Intel with AM2 and HT
    - Intel Presler 955: Benchmarking the First 65...

    Developer Shed Affiliates


    © 2003-2019 by Developer Shed. All rights reserved. DS Cluster - Follow our Sitemap
    KEITHLEE2zdeconfigurator/configs/INFUSIONSOFT_OVERLAY.phpzdeconfigurator/configs/ OFFLOADING INFUSIONSOFTLOADING INFUSIONSOFT 1debug:overlay status: OFF
    overlay not displayed overlay cookie defined: TI_CAMPAIGN_1012_D OVERLAY COOKIE set:
    status off