Intel`s Newest Itanium - Grained Multithreading and Itanium's Future
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The ever increasing cache sizes are used to offset the bus connection, and try to avoid any situations where you are left waiting on the main memory. Itanium2 tends to be very sensitive to these situations. x86 processors get around this by using an "out of order" core, which allows you to skip over to other instructions which are not dependant on the outcome that is held up by the cache miss. Itanium2 on the other hand is very dependant on each instruction that it is fed being done in order; all optimization is done in the compiler as opposed to changed dynamically by the CPU.
Montecito does have one ace up its sleeve to alleviate that situation. It is called coarse grained multithreading, a slight change from the HyperThreading many of you have experienced on the Pentium4. Unlike the P4, the two threads do not run simultaneously; the Itanium2 is very good at filling it's available execution ports every cycle and does not need assistance there. What it does is hold one thread in reserve and switch to it when a high latency event such as a cache miss occurs and there is a need to go to memory.
Instead of waiting on this event and bringing performance to a halt, the core switches to another thread and executes until it comes to another slow down situation. By that time the idea is that the data you were waiting on before is now in the cache, and you can start back up on the first thread where you left off.
Losing a few cycles to switch threads is much less of an impact than the disaster that waiting on main memory is. This gives the appearance of 4 threads per die, though in reality only two are going to be executed at any one time.
The other advantages of Montecito we have discussed before: lower power consumption due to dynamic clock and voltage adjustments across the CPU, more robust error correction and with software support later you will also be able to have multiple operating systems functioning on the same chip.
In summary, Monday's announcement isn't really about today. It is more about getting prepared for the future of Intel's enterprise level computing. Still, this should be a welcome announcement for companies looking to add to their immediate mainframe needs as it does help to limit one of the current issues that Itanium2 has once you start getting into the 4+ CPU clusters. Since the only real competition in that bracket is from the IBM Power series, Intel really has no need to beef up the lineup beyond what they’ve done until Montecito is ready for primetime.
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