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Intel Says Goodbye to 4GHz P4
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    Table of Contents:
  • Intel Says Goodbye to 4GHz P4
  • Design Principles
  • Why This Business of Dual Core?
  • The Core of the Problem

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    Intel Says Goodbye to 4GHz P4 - Design Principles

    (Page 2 of 4 )

    Since 2000, Intel has prayed exclusively at the alter of MHz, or in this case, GHz. After a scare where the company was on the verge of losing the speed crown to AMD's Athlon, Intel quickly changed the whole design philosophy of the corporation's mainline products. Dumping the P6 core which had powered everything from 150MHz Pentium Pro's through to the 1.13Ghz Pentium III's (and the eventual 1.4GHz Tulatin PIII), Intel has set its design teams to creating something dedicated wholly to increasing one number: clock speed, the big number written on every processor's box. Not performance as electrical engineers know it, but performance as Joe Sixpack sees it.

    With the Netburst design principles, Intel set out to make tradeoffs in terms of performance clock for clock, in order to increase the speed of the chip itself. An analogy is to look at car engines. A Honda S2000 makes 240 horsepower, at a pretty ridiculous 8500RPM. Older 5.0L Ford V8's placed in everything from Mustangs to Explorers also had that same performance rating, but made it at around 4800RPM. To someone who merely looks at the horsepower rating, the engines are very similar in performance. However, they have very different ways of achieving that. It's the same for application performance. Intel would have to scale their new baby much further in clock speed to achieve similar performance to their previous design.

    Willamette, the first chip with these design principles at its heart, didn't do so well. It was certainly hot, but not in the good way. Built on the aged 180nanometer process and rushed to market thanks to the faltering and subsequent recall of the 1.13GHz PIII's, the first Pentium4's were slow, hot, and tied to RAMBUS. Not exactly the happy welcome planned initially.

    Intel's engineering prowess made up for these shortcomings with the introduction of the Northwood revision on 130nanometer. Sporting a new socket and some hidden talents, it actually did exactly what Intel had hoped for. It scaled incredibly well, both performance and speed wise, without very many bumps in the road. In addition to those clock jumps, Northwood also brought out HyperThreading (HT) to the party in addition to the other P4 enhancements required to make Netburst efficient. While most of the P4's internal trickery was devoted to keeping pipeline stalls to a minimum, in a way so too was HT.

    Unlike those others though, HT required software support, in the form of multithreaded applications and operating systems. With the operating system wheeling and dealing for what it thought was two full processors, the single P4 was able to have ample amounts of instructions fed into it's pipeline. This of course required the applications themselves to be multithreaded, which at the time were few and far between. With the exception of software meant strictly for workstation use, this was SSE all over again.

    Things started to come around, and since then, albeit ever so slowly, some software has added that functionality. Today, this is a very important thing, considering a certain part of Intel's announcement.

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